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<title>Computer performance</title>

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<span id="openzim-page-title" class="mw-page-title-main"><span class="mw-page-title-main">Computer performance</span></span>

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<p>In <a href="Computing" title="Computing">computing</a>, <b>computer performance</b> is the amount of useful work accomplished by a <a href="Computer_system" class="mw-redirect" title="Computer system">computer system</a>. Outside of specific contexts, computer performance is estimated in terms of accuracy, <a href="Efficiency" title="Efficiency">efficiency</a> and speed of executing <a href="Computer_program" title="Computer program">computer program</a> instructions. When it comes to high computer performance, one or more of the following factors might be involved:

</p>

<ul><li>Short <a href="Response_time_(technology)" title="Response time (technology)">response time</a> for a given piece of work.</li>

<li>High <a href="Throughput" class="mw-redirect" title="Throughput">throughput</a> (rate of processing work tasks).</li>

<li>Low utilization of <a href="Computing_resource" class="mw-redirect" title="Computing resource">computing resources</a>.

<ul><li>Fast (or highly compact) <a href="Data_compression" title="Data compression">data compression</a> and decompression.</li></ul></li>

<li><a href="High_availability" title="High availability">High availability</a> of the computing system or application.</li>

<li>High <a href="Bandwidth_(computing)" title="Bandwidth (computing)">bandwidth</a>.</li>

<li>Short <a href="Data_transmission" class="mw-redirect" title="Data transmission">data transmission</a> time.</li></ul>

<div class="mw-heading mw-heading2"><h2 id="Technical_and_non-technical_definitions">Technical and non-technical definitions</h2></div>

<p>The performance of any computer system can be evaluated in measurable, technical terms, using one or more of the metrics listed above. This way the performance can be

</p>

<ul><li>Compared relative to other systems or the same system before/after changes</li>

<li>In absolute terms, e.g. for fulfilling a contractual obligation</li></ul>

<p>Whilst the above definition relates to a scientific, technical approach, the following definition given by <a href="Arnold_Allen_(mathematician)" title="Arnold Allen (mathematician)">Arnold Allen</a> would be useful for a non-technical audience:

</p>

<blockquote><p><i>The word </i>performance<i> in computer performance means the same thing that performance means in other contexts, that is, it means "How well is the computer doing the work it is supposed to do?"</i><sup id="cite_ref-1" class="reference"><a href="#cite_note-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup></p></blockquote>

<div class="mw-heading mw-heading3"><h3 id="As_an_aspect_of_software_quality">As an aspect of software quality</h3></div>

<p><a href="Computer_software" class="mw-redirect" title="Computer software">Computer software</a> performance, particularly <a href="Software_application" class="mw-redirect" title="Software application">software application</a> response time, is an aspect of <a href="Software_quality" title="Software quality">software quality</a> that is important in <a href="Human%E2%80%93computer_interaction" title="Human–computer interaction">human–computer interactions</a>.

</p>

<div class="mw-heading mw-heading2"><h2 id="Performance_engineering">Performance engineering</h2></div>

<p>Performance engineering within systems engineering encompasses the set of roles, skills, activities, practices, tools, and deliverables applied at every phase of the systems development life cycle which ensures that a solution will be designed, implemented, and operationally supported to meet the performance requirements defined for the solution.

</p><p>Performance engineering continuously deals with trade-offs between types of performance. Occasionally a <a href="CPU_design" class="mw-redirect" title="CPU design">CPU designer</a> can find a way to make a <a href="Central_processing_unit" title="Central processing unit">CPU</a> with better overall performance by improving one of the aspects of performance, presented below, without sacrificing the CPU's performance in other areas. For example, building the CPU out of better, faster <a href="Transistor" title="Transistor">transistors</a>.

</p><p>However, sometimes pushing one type of performance to an extreme leads to a CPU with worse overall performance, because other important aspects were sacrificed to get one impressive-looking number, for example, the chip's <a href="Clock_rate" title="Clock rate">clock rate</a> (see the <a href="Megahertz_myth" title="Megahertz myth">megahertz myth</a>).

</p>

<div class="mw-heading mw-heading3"><h3 id="Application_performance_engineering">Application performance engineering</h3></div>

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</style><div role="note" class="hatnote navigation-not-searchable">Main article: <a href="Application_performance_engineering" title="Application performance engineering">Application performance engineering</a></div>

<p>Application Performance Engineering (APE) is a specific methodology within <a href="Performance_engineering" title="Performance engineering">performance engineering</a> designed to meet the challenges associated with application performance in increasingly distributed mobile, cloud and terrestrial IT environments. It includes the roles, skills, activities, practices, tools and deliverables applied at every phase of the application lifecycle that ensure an application will be designed, implemented and operationally supported to meet non-functional performance requirements.

</p>

<div class="mw-heading mw-heading2"><h2 id="Aspects_of_performance">Aspects of performance</h2></div>

<p>Computer performance <a href="Software_metric" title="Software metric">metrics</a> (things to measure) include <a href="Availability" title="Availability">availability</a>, <a href="Response_time_(technology)" title="Response time (technology)">response time</a>, <a href="Channel_capacity" title="Channel capacity">channel capacity</a>, <a href="Latency_(engineering)" title="Latency (engineering)">latency</a>, completion time, <a href="Service_time" class="mw-redirect" title="Service time">service time</a>, <a href="Bandwidth_(computing)" title="Bandwidth (computing)">bandwidth</a>, <a href="Throughput" class="mw-redirect" title="Throughput">throughput</a>, <a href="Relative_efficiency" class="mw-redirect" title="Relative efficiency">relative efficiency</a>, <a href="Scalability" title="Scalability">scalability</a>, <a href="Performance_per_watt" title="Performance per watt">performance per watt</a>, <a href="Data_compression" title="Data compression">compression ratio</a>, <a href="Instruction_path_length" title="Instruction path length">instruction path length</a> and <a href="Speed_up" class="mw-redirect" title="Speed up">speed up</a>. <a href="CPU" class="mw-redirect" title="CPU">CPU</a> benchmarks are available.<sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup>

</p>

<div class="mw-heading mw-heading3"><h3 id="Availability">Availability</h3></div>

<div role="note" class="hatnote navigation-not-searchable">Main article: <a href="Availability" title="Availability">Availability</a></div>

<p>Availability of a system is typically measured as a factor of its reliability - as reliability increases, so does availability (that is, less <a href="Downtime" title="Downtime">downtime</a>). Availability of a system may also be increased by the strategy of focusing on increasing testability and maintainability and not on reliability. Improving maintainability is generally easier than reliability. Maintainability estimates (repair rates) are also generally more accurate. However, because the uncertainties in the reliability estimates are in most cases very large, it is likely to dominate the availability (prediction uncertainty) problem, even while maintainability levels are very high.

</p>

<div class="mw-heading mw-heading3"><h3 id="Response_time">Response time</h3></div>

<div role="note" class="hatnote navigation-not-searchable">Main article: <a href="Response_time_(technology)" title="Response time (technology)">Response time (technology)</a></div>

<p>Response time is the total amount of time it takes to respond to a request for service. In computing, that service can be any unit of work from a simple <a href="Computer_data_storage" title="Computer data storage">disk IO</a> to loading a complex <a href="Web_page" title="Web page">web page</a>. The response time is the sum of three numbers:<sup id="cite_ref-3" class="reference"><a href="#cite_note-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup>

</p>

<ul><li>Service time - How long it takes to do the work requested.</li>

<li>Wait time - How long the request has to wait for requests queued ahead of it before it gets to run.</li>

<li>Transmission time – How long it takes to move the request to the computer doing the work and the response back to the requestor.</li></ul>

<div class="mw-heading mw-heading3"><h3 id="Processing_speed">Processing speed</h3></div>

<div role="note" class="hatnote navigation-not-searchable">Main articles: <a href="Instructions_per_second" title="Instructions per second">Instructions per second</a> and <a href="FLOPS" class="mw-redirect" title="FLOPS">FLOPS</a></div>

<p>Most consumers pick a computer architecture (normally <a href="Intel" title="Intel">Intel</a> <a href="IA-32" title="IA-32">IA-32</a> architecture) to be able to run a large base of pre-existing, pre-compiled software. Being relatively uninformed on computer benchmarks, some of them pick a particular CPU based on operating frequency (see <a href="Megahertz_myth" title="Megahertz myth">megahertz myth</a>).

</p><p>Some system designers building parallel computers pick CPUs based on the speed per dollar.

</p>

<div class="mw-heading mw-heading3"><h3 id="Channel_capacity">Channel capacity</h3></div>

<div role="note" class="hatnote navigation-not-searchable">Main article: <a href="Channel_capacity" title="Channel capacity">Channel capacity</a></div>

<p>Channel capacity is the tightest upper bound on the rate of <a href="Information" title="Information">information</a> that can be reliably transmitted over a <a href="Channel_(communications)" class="mw-redirect" title="Channel (communications)">communications channel</a>. By the <a href="Noisy-channel_coding_theorem" title="Noisy-channel coding theorem">noisy-channel coding theorem</a>, the channel capacity of a given channel is the limiting information rate (in units of <a href="Information_entropy" class="mw-redirect" title="Information entropy">information</a> per unit time) that can be achieved with arbitrarily small error probability.<sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup>

</p><p><a href="Information_theory" title="Information theory">Information theory</a>, developed by <a href="Claude_E._Shannon" class="mw-redirect" title="Claude E. Shannon">Claude E. Shannon</a> during <a href="World_War_II" title="World War II">World War II</a>, defines the notion of channel capacity and provides a mathematical model by which one can compute it. The key result states that the capacity of the channel, as defined above, is given by the maximum of the <a href="Mutual_information" title="Mutual information">mutual information</a> between the input and output of the channel, where the maximization is with respect to the input distribution.<sup id="cite_ref-6" class="reference"><a href="#cite_note-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup>

</p>

<div class="mw-heading mw-heading3"><h3 id="Latency">Latency</h3></div>

<div role="note" class="hatnote navigation-not-searchable">Main article: <a href="Latency_(engineering)" title="Latency (engineering)">Latency (engineering)</a></div>

<p>Latency is a time delay between the cause and the effect of some physical change in the system being observed. Latency is a result of the limited velocity with which any physical interaction can take place. This velocity is always lower or equal to speed of light. Therefore, every physical system that has non-zero spatial dimensions will experience some sort of latency.

</p><p>The precise definition of latency depends on the system being observed and the nature of stimulation. In communications, the lower limit of latency is determined by the medium being used for communications. In reliable two-way communication systems, latency limits the maximum rate that information can be transmitted, as there is often a limit on the amount of information that is "in-flight" at any one moment. In the field of human-machine interaction, perceptible latency (delay between what the user commands and when the computer provides the results) has a strong effect on user satisfaction and usability.

</p><p>Computers run sets of instructions called a process. In operating systems, the execution of the process can be postponed if other processes are also executing. In addition, the operating system can schedule when to perform the action that the process is commanding. For example, suppose a process commands that a computer card's voltage output be set high-low-high-low and so on at a rate of 1000 Hz. The operating system may choose to adjust the scheduling of each transition (high-low or low-high) based on an internal clock. The latency is the delay between the process instruction commanding the transition and the hardware actually transitioning the voltage from high to low or low to high.

</p><p>System designers building <a href="Real-time_computing" title="Real-time computing">real-time computing</a> systems want to guarantee worst-case response. That is easier to do when the CPU has low <a href="Interrupt_latency" title="Interrupt latency">interrupt latency</a> and when it has a deterministic response.

</p>

<div class="mw-heading mw-heading3"><h3 id="Bandwidth">Bandwidth</h3></div>

<div role="note" class="hatnote navigation-not-searchable">Main article: <a href="Bandwidth_(computing)" title="Bandwidth (computing)">Bandwidth (computing)</a></div>

<p>In computer networking, bandwidth is a measurement of bit-rate of available or consumed <a href="Data_communication" title="Data communication">data communication</a> resources, expressed in bits per second or multiples of it (bit/s, kbit/s, Mbit/s, Gbit/s, etc.).

</p><p>Bandwidth sometimes defines the net bit rate (aka. peak bit rate, information rate, or physical layer useful bit rate), channel capacity, or the maximum throughput of a logical or physical communication path in a digital communication system. For example, bandwidth tests measure the maximum throughput of a computer network. The reason for this usage is that according to Hartley's law, the maximum data rate of a physical communication link is proportional to its bandwidth in hertz, which is sometimes called frequency bandwidth, spectral bandwidth, RF bandwidth, signal bandwidth or analog bandwidth.

</p>

<div class="mw-heading mw-heading3"><h3 id="Throughput">Throughput</h3></div>

<div role="note" class="hatnote navigation-not-searchable">Main article: <a href="Throughput" class="mw-redirect" title="Throughput">Throughput</a></div>

<p>In general terms, throughput is the rate of production or the rate at which something can be processed.

</p><p>In communication networks, throughput is essentially synonymous to digital bandwidth consumption. In <a href="Wireless_network" title="Wireless network">wireless networks</a> or <a href="Cellular_communication_networks" class="mw-redirect" title="Cellular communication networks">cellular communication networks</a>, the <a href="System_spectral_efficiency" class="mw-redirect" title="System spectral efficiency">system spectral efficiency</a> in bit/s/Hz/area unit, bit/s/Hz/site or bit/s/Hz/cell, is the maximum system throughput (aggregate throughput) divided by the analog bandwidth and some measure of the system coverage area.

</p><p>In integrated circuits, often a block in a <a href="Data_flow_diagram" class="mw-redirect" title="Data flow diagram">data flow diagram</a> has a single input and a single output, and operates on discrete packets of information. Examples of such blocks are <a href="Fast_Fourier_transform" title="Fast Fourier transform">FFT</a> modules or <a href="Binary_multiplier" title="Binary multiplier">binary multipliers</a>. Because the units of throughput are the reciprocal of the unit for <a href="Propagation_delay" title="Propagation delay">propagation delay</a>, which is 'seconds per message' or 'seconds per output', throughput can be used to relate a computational device performing a dedicated function such as an <a href="ASIC" class="mw-redirect" title="ASIC">ASIC</a> or <a href="Embedded_processor" class="mw-redirect" title="Embedded processor">embedded processor</a> to a communications channel, simplifying system analysis.

</p>

<div class="mw-heading mw-heading3"><h3 id="Scalability">Scalability</h3></div>

<div role="note" class="hatnote navigation-not-searchable">Main article: <a href="Scalability" title="Scalability">Scalability</a></div>

<p>Scalability is the ability of a system, network, or process to handle a growing amount of work in a capable manner or its ability to be enlarged to accommodate that growth.

</p>

<div class="mw-heading mw-heading3"><h3 id="Power_consumption">Power consumption</h3></div>

<p>The amount of <a href="Electric_power" title="Electric power">electric power</a> used by the computer (<a href="Power_consumption" class="mw-redirect" title="Power consumption">power consumption</a>). This becomes especially important for systems with limited power sources such as solar, batteries, and human power.

</p>

<div class="mw-heading mw-heading4"><h4 id="Performance_per_watt">Performance per watt</h4></div>

<div role="note" class="hatnote navigation-not-searchable">Main article: <a href="Performance_per_watt" title="Performance per watt">Performance per watt</a></div>

<p>System designers building <a href="Parallel_computing" title="Parallel computing">parallel computers</a>, such as <a href="Google_search_technology" class="mw-redirect" title="Google search technology">Google's hardware</a>, pick CPUs based on their speed per watt of power, because the cost of powering the CPU outweighs the cost of the CPU itself.<sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup>

</p><p>For spaceflight computers, the processing speed per watt ratio is a more useful performance criterion than raw processing speed due to limited on-board resources of power.<sup id="cite_ref-8" class="reference"><a href="#cite_note-8"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup>

</p>

<div class="mw-heading mw-heading3"><h3 id="Compression_ratio">Compression ratio</h3></div>

<div role="note" class="hatnote navigation-not-searchable">Main article: <a href="Data_compression" title="Data compression">Data compression</a></div>

<p>Compression is useful because it helps reduce resource usage, such as data storage space or transmission capacity. Because compressed data must be decompressed to use, this extra processing imposes computational or other costs through decompression; this situation is far from being a free lunch. Data compression is subject to a space–time complexity trade-off.

</p>

<div class="mw-heading mw-heading3"><h3 id="Size_and_weight">Size and weight</h3></div>

<p>This is an important performance feature of mobile systems, from the smart phones you keep in your pocket to the portable embedded systems in a spacecraft.

</p>

<div class="mw-heading mw-heading3"><h3 id="Environmental_impact">Environmental impact</h3></div>

<div role="note" class="hatnote navigation-not-searchable">Further information: <a href="Green_computing" title="Green computing">Green computing</a></div>

<p>The effect of computing on the environment, during manufacturing and recycling as well as during use. Measurements are taken with the objectives of reducing waste, reducing hazardous materials, and minimizing a computer's <a href="Ecological_footprint" title="Ecological footprint">ecological footprint</a>.

</p>

<div class="mw-heading mw-heading3"><h3 id="Transistor_count">Transistor count</h3></div>

<div role="note" class="hatnote navigation-not-searchable">Main article: <a href="Transistor_count" title="Transistor count">Transistor count</a></div>

<p>The number of <a href="Transistor" title="Transistor">transistors</a> on an <a href="Integrated_circuit" title="Integrated circuit">integrated circuit</a> (IC). Transistor count is the most common measure of IC complexity.

</p>

<div class="mw-heading mw-heading2"><h2 id="Benchmarks">Benchmarks</h2></div>

<div role="note" class="hatnote navigation-not-searchable">Main article: <a href="Benchmark_(computing)" title="Benchmark (computing)">Benchmark (computing)</a></div>

<p>Because there are so many programs to test a CPU on all aspects of performance, <a href="Benchmark_(computing)" title="Benchmark (computing)">benchmarks</a> were developed.

</p><p>The most famous benchmarks are the SPECint and <a href="SPECfp" title="SPECfp">SPECfp</a> benchmarks developed by <a href="Standard_Performance_Evaluation_Corporation" title="Standard Performance Evaluation Corporation">Standard Performance Evaluation Corporation</a> and the Certification Mark benchmark developed by the Embedded Microprocessor Benchmark Consortium <a href="EEMBC" title="EEMBC">EEMBC</a>.

</p>

<div class="mw-heading mw-heading2"><h2 id="Software_performance_testing">Software performance testing</h2></div>

<div role="note" class="hatnote navigation-not-searchable">Main article: <a href="Software_performance_testing" title="Software performance testing">Software performance testing</a></div>

<p>In software engineering, performance testing is, in general, conducted to determine how a system performs in terms of responsiveness and stability under a particular workload. It can also serve to investigate, measure, validate, or verify other quality attributes of the system, such as scalability, reliability, and resource usage.

</p><p>Performance testing is a subset of performance engineering, an emerging computer science practice which strives to build performance into the implementation, design, and architecture of a system.

</p>

<div class="mw-heading mw-heading3"><h3 id="Profiling_(performance_analysis)">Profiling (performance analysis)</h3></div>

<div role="note" class="hatnote navigation-not-searchable">Main article: <a href="Profiling_(computer_programming)" title="Profiling (computer programming)">Profiling (computer programming)</a></div>

<p>In <a href="Software_engineering" title="Software engineering">software engineering</a>, profiling ("program profiling", "software profiling") is a form of <a href="Dynamic_program_analysis" title="Dynamic program analysis">dynamic program analysis</a> that measures, for example, the space (memory) or time <a href="Computational_complexity_theory" title="Computational complexity theory">complexity of a program</a>, the <a href="Instruction_set_simulator" title="Instruction set simulator">usage of particular instructions</a>, or frequency and duration of function calls. The most common use of profiling information is to aid program <a href="Optimization_(computer_science)" class="mw-redirect" title="Optimization (computer science)">optimization</a>.

</p><p>Profiling is achieved by instrumenting either the program <a href="Source_code" title="Source code">source code</a> or its binary executable form using a tool called a <i>profiler</i> (or <i>code profiler</i>). A number of different techniques may be used by profilers, such as event-based, statistical, instrumented, and simulation methods.

</p>

<div class="mw-heading mw-heading2"><h2 id="Performance_tuning">Performance tuning</h2></div>

<div role="note" class="hatnote navigation-not-searchable">Main article: <a href="Performance_tuning" title="Performance tuning">Performance tuning</a></div>

<p>Performance tuning is the improvement of <a href="System" title="System">system</a> performance. This is typically a computer application, but the same methods can be applied to economic markets, bureaucracies or other complex systems. The motivation for such activity is called a performance problem, which can be real or anticipated. Most systems will respond to increased <a href="Load_(computing)" title="Load (computing)">load</a> with some degree of decreasing performance. A system's ability to accept a higher load is called <a href="Scalability" title="Scalability">scalability</a>, and modifying a system to handle a higher load is synonymous to performance tuning.

</p><p>Systematic tuning follows these steps:

</p>

<ol><li>Assess the problem and establish numeric values that categorize acceptable behavior.</li>

<li>Measure the performance of the system before modification.</li>

<li>Identify the part of the system that is critical for improving the performance. This is called the <a href="Bottleneck_(software)" title="Bottleneck (software)">bottleneck</a>.</li>

<li>Modify that part of the system to remove the bottleneck.</li>

<li>Measure the performance of the system after modification.</li>

<li>If the modification makes the performance better, adopt it. If the modification makes the performance worse, put it back to the way it was.</li></ol>

<div class="mw-heading mw-heading2"><h2 id="Perceived_performance">Perceived performance</h2></div>

<div role="note" class="hatnote navigation-not-searchable">Main article: <a href="Perceived_performance" title="Perceived performance">Perceived performance</a></div>

<p>Perceived performance, in computer engineering, refers to how quickly a software feature appears to perform its task. The concept applies mainly to <a href="User_acceptance_test" class="mw-redirect" title="User acceptance test">user acceptance</a> aspects.

</p><p>The amount of time an application takes to start up, or a file to download, is not made faster by showing a startup screen (see Splash screen) or a file progress dialog box. However, it satisfies some human needs: it appears faster to the user as well as provides a visual cue to let them know the system is handling their request.

</p><p>In most cases, increasing real performance increases perceived performance, but when real performance cannot be increased due to physical limitations, techniques can be used to increase perceived performance.

</p><p>

</p>

<div class="mw-heading mw-heading2"><h2 id="Performance_Equation">Performance Equation</h2></div>

<p>The total amount of time (<b>t</b>) required to execute a particular benchmark program is

</p>

<mfrac>

<mrow>

</mrow>

</mfrac>

</mstyle>

</mrow>

</mstyle>

</mrow>

<annotation encoding="application/x-tex">{\displaystyle t={\tfrac {NC}{f}}}</annotation>

</semantics>

</math></span><img src="./fb76955c00a0fd56b465619b34b5ceb4222a4122.svg" class="mwe-math-fallback-image-inline mw-invert skin-invert" aria-hidden="true" style="vertical-align: -1.671ex; width:7.482ex; height:4.176ex;" alt="{\displaystyle t={\tfrac {NC}{f}}}" loading="lazy"></span></b> , or equivalently</dd>

<mfrac>

<mrow>

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</mstyle>

</mrow>

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</mrow>

<annotation encoding="application/x-tex">{\displaystyle P={\tfrac {If}{N}}}</annotation>

</semantics>

</math></span><img src="./22bb422bd525f60a2e969cb56b64dde7a71c4f76.svg" class="mwe-math-fallback-image-inline mw-invert skin-invert" aria-hidden="true" style="vertical-align: -1.171ex; width:7.413ex; height:4.009ex;" alt="{\displaystyle P={\tfrac {If}{N}}}" loading="lazy"></span></b><sup id="cite_ref-shrinking_9-0" class="reference"><a href="#cite_note-shrinking-9"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup></dd></dl>

<p>where

</p>

<mfrac>

</mfrac>

</mrow>

</mstyle>

</mrow>

<annotation encoding="application/x-tex">{\textstyle P={\frac {1}{t}}}</annotation>

</semantics>

</math></span><img src="./094b1d96192941cdc8c5a6131cbe962bc5b910e7.svg" class="mwe-math-fallback-image-inline mw-invert skin-invert" aria-hidden="true" style="vertical-align: -1.171ex; width:6.502ex; height:3.509ex;" alt="{\textstyle P={\frac {1}{t}}}" loading="lazy"></span> is "the performance" in terms of time-to-execute</li>

</mstyle>

</mrow>

<annotation encoding="application/x-tex">{\textstyle N}</annotation>

</semantics>

</math></span><img src="./0d21d55fc102ec49600d3d5522a59ae4561acc22.svg" class="mwe-math-fallback-image-inline mw-invert skin-invert" aria-hidden="true" style="vertical-align: -0.338ex; width:2.064ex; height:2.176ex;" alt="{\textstyle N}" loading="lazy"></span> is the number of instructions actually executed (the <a href="Instruction_path_length" title="Instruction path length">instruction path length</a>). The <a href="Instruction_set" class="mw-redirect" title="Instruction set">code density</a> of the <a href="Instruction_set" class="mw-redirect" title="Instruction set">instruction set</a> strongly affects <b>N</b>. The value of <b>N</b> can either be determined <b>exactly</b> by using an <a href="Instruction_set_simulator" title="Instruction set simulator">instruction set simulator</a> (if available) or by estimation—itself based partly on estimated or actual frequency distribution of input variables and by examining generated <a href="Machine_code" title="Machine code">machine code</a> from an <a href="High-level_programming_language" title="High-level programming language">HLL</a> compiler. It cannot be determined from the number of lines of HLL source code. N is not affected by other processes running on the same processor. The significant point here is that hardware normally does not keep track of (or at least make easily available) a value of N for executed programs. The value can therefore only be accurately determined by instruction set simulation, which is rarely practiced.</li>

</mstyle>

</mrow>

<annotation encoding="application/x-tex">{\textstyle f}</annotation>

</semantics>

</math></span><img src="./e1b77076edca76caf3331d0551d1645b8f678283.svg" class="mwe-math-fallback-image-inline mw-invert skin-invert" aria-hidden="true" style="vertical-align: -0.671ex; width:1.279ex; height:2.509ex;" alt="{\textstyle f}" loading="lazy"></span> is the clock frequency in cycles per second.</li>

<mfrac>

</mfrac>

</mrow>

</mstyle>

</mrow>

<annotation encoding="application/x-tex">{\textstyle C={\frac {1}{I}}}</annotation>

</semantics>

</math></span><img src="./88bf288fbccfa3e05b7ff97a4080ea04fc644386.svg" class="mwe-math-fallback-image-inline mw-invert skin-invert" aria-hidden="true" style="vertical-align: -1.171ex; width:6.529ex; height:3.509ex;" alt="{\textstyle C={\frac {1}{I}}}" loading="lazy"></span> is the average <a href="Cycles_per_instruction" title="Cycles per instruction">cycles per instruction</a> (CPI) for this benchmark.</li>

<mfrac>

</mfrac>

</mrow>

</mstyle>

</mrow>

<annotation encoding="application/x-tex">{\textstyle I={\frac {1}{C}}}</annotation>

</semantics>

</math></span><img src="./a9e734869b99a36a4d950386e08c5829953ca9e3.svg" class="mwe-math-fallback-image-inline mw-invert skin-invert" aria-hidden="true" style="vertical-align: -1.338ex; width:6.355ex; height:3.676ex;" alt="{\textstyle I={\frac {1}{C}}}" loading="lazy"></span> is the average <a href="Instructions_per_cycle" title="Instructions per cycle">instructions per cycle</a> (IPC) for this benchmark.</li></ul>

<p>Even on one machine, a different compiler or the same compiler with different <a href="Compiler_optimization" class="mw-redirect" title="Compiler optimization">compiler optimization</a> switches can change N and CPI—the benchmark executes faster if the new compiler can improve N or C without making the other worse, but often there is a trade-off between them—is it better, for example, to use a few complicated instructions that take a long time to execute, or to use instructions that execute very quickly, although it takes more of them to execute the benchmark?

</p><p>

A CPU designer is often required to implement a particular <a href="Instruction_set" class="mw-redirect" title="Instruction set">instruction set</a>, and so cannot change N.

Sometimes a designer focuses on improving performance by making significant improvements in f (with techniques such as deeper pipelines and faster caches), while (hopefully) not sacrificing too much C—leading to a speed-demon CPU design.

Sometimes a designer focuses on improving performance by making significant improvements in CPI (with techniques such as <a href="Out-of-order_execution" title="Out-of-order execution">out-of-order execution</a>, <a href="Superscalar" class="mw-redirect" title="Superscalar">superscalar</a> CPUs, larger caches, caches with improved hit rates, improved <a href="Branch_predictor" title="Branch predictor">branch prediction</a>, <a href="Speculative_execution" title="Speculative execution">speculative execution</a>, etc.), while (hopefully) not sacrificing too much clock frequency—leading to a brainiac CPU design.<sup id="cite_ref-10" class="reference"><a href="#cite_note-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup>

For a given instruction set (and therefore fixed N) and semiconductor process, the maximum single-thread performance (1/t) requires a balance between brainiac techniques and speedracer techniques.<sup id="cite_ref-shrinking_9-1" class="reference"><a href="#cite_note-shrinking-9"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup>

</p>

<ul><li><a href="Algorithmic_efficiency" title="Algorithmic efficiency">Algorithmic efficiency</a></li>

<li><a href="Computer_performance_by_orders_of_magnitude" title="Computer performance by orders of magnitude">Computer performance by orders of magnitude</a></li>

<li><a href="Network_performance" title="Network performance">Network performance</a></li>

<li><a href="Latency_oriented_processor_architecture" title="Latency oriented processor architecture">Latency oriented processor architecture</a></li>

<li><a href="Optimization_(computer_science)" class="mw-redirect" title="Optimization (computer science)">Optimization (computer science)</a></li>

<li><a href="RAM_update_rate" class="mw-redirect" title="RAM update rate">RAM update rate</a></li>

<li>Complete <a href="Instruction_set" class="mw-redirect" title="Instruction set">instruction set</a></li>

<li><a href="Hardware_acceleration" title="Hardware acceleration">Hardware acceleration</a></li>

<li><a href="Speedup" title="Speedup">Speedup</a></li>

<li><a href="Cache_replacement_policies" title="Cache replacement policies">Cache replacement policies</a></li>

<li><a rel="nofollow" class="external text" href="https://www.laptopicker.com/how-to-optimize-my-pc-hardware/">Understanding Your PC Hardware</a></li>

<li><a href="Relative_efficiency" class="mw-redirect" title="Relative efficiency">Relative efficiency</a></li></ul>

<div class="mw-heading mw-heading2"><h2 id="References">References</h2></div>

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<li id="cite_note-1"><span class="mw-cite-backlink"><b><a href="#cite_ref-1">^</a></b></span> <span class="reference-text">Computer Performance Analysis with Mathematica by Arnold O. Allen, Academic Press, 1994. <i>$1.1 Introduction, pg 1.</i></span>

</li>

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</style><cite class="citation cs2"><i>Measuring Program Similarity: Experiments with SPEC CPU Benchmark Suites</i>, 2005, pp. <span class="nowrap">10–</span>20, <a href="CiteSeerX_(identifier)" class="mw-redirect" title="CiteSeerX (identifier)">CiteSeerX</a> <span class="id-lock-free" title="Freely accessible"><a rel="nofollow" class="external text" href="https://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.123.501">10.1.1.123.501</a></span></cite></span>

</li>

<li id="cite_note-3"><span class="mw-cite-backlink"><b><a href="#cite_ref-3">^</a></b></span> <span class="reference-text"><cite id="CITEREFWescott2013" class="citation book cs1">Wescott, Bob (2013). <i>The Every Computer Performance Book, Chapter 3: Useful laws</i>. <a href="CreateSpace" title="CreateSpace">CreateSpace</a>. <a href="ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <bdi>978-1482657753</bdi>.</cite></span>

</li>

<li id="cite_note-4"><span class="mw-cite-backlink"><b><a href="#cite_ref-4">^</a></b></span> <span class="reference-text"><cite id="CITEREFSaleem_Bhatti" class="citation web cs1">Saleem Bhatti. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20070821212637/http://www.cs.ucl.ac.uk/staff/S.Bhatti/D51-notes/node31.html">"Channel capacity"</a>. <i>Lecture notes for M.Sc. Data Communication Networks and Distributed Systems D51 -- Basic Communications and Networks</i>. Archived from <a rel="nofollow" class="external text" href="http://www.cs.ucl.ac.uk/staff/S.Bhatti/D51-notes/node31.html">the original</a> on 2007-08-21.</cite></span>

</li>

<li id="cite_note-5"><span class="mw-cite-backlink"><b><a href="#cite_ref-5">^</a></b></span> <span class="reference-text"><cite id="CITEREFJim_Lesurf" class="citation web cs1">Jim Lesurf. <a rel="nofollow" class="external text" href="http://www.st-andrews.ac.uk/~www_pa/Scots_Guide/iandm/part8/page1.html">"Signals look like noise!"</a>. <i>Information and Measurement, 2nd ed</i>.</cite></span>

</li>

<li id="cite_note-6"><span class="mw-cite-backlink"><b><a href="#cite_ref-6">^</a></b></span> <span class="reference-text"><cite id="CITEREFThomas_M._Cover,_Joy_A._Thomas2006" class="citation book cs1">Thomas M. Cover, Joy A. Thomas (2006). <i>Elements of Information Theory</i>. John Wiley & Sons, New York.</cite></span>

</li>

<li id="cite_note-7"><span class="mw-cite-backlink"><b><a href="#cite_ref-7">^</a></b></span> <span class="reference-text"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20050327005323/http://www.eembc.org/benchmark/consumer.asp?HTYPE=SIM">"EEMBC -- the Embedded Microprocessor Benchmark Consortium"</a>. Archived from <a rel="nofollow" class="external text" href="http://www.eembc.org/benchmark/consumer.asp?HTYPE=SIM">the original</a> on 2005-03-27<span class="reference-accessdate">. Retrieved <span class="nowrap">2009-01-21</span></span>.</cite><a rel="nofollow" class="external autonumber" href="http://news.cnet.com/Power+could+cost+more+than+servers,+Google+warns/2100-1010_3-5988090.html">[1]</a></span>

</li>

<li id="cite_note-8"><span class="mw-cite-backlink"><b><a href="#cite_ref-8">^</a></b></span> <span class="reference-text">D. J. Shirley; and M. K. McLelland. <a rel="nofollow" class="external text" href="https://digitalcommons.usu.edu/cgi/viewcontent.cgi?article=2656&context=smallsat">"The Next-Generation SC-7 RISC Spaceflight Computer"</a>. p. 2.</span>

</li>

<li id="cite_note-shrinking-9"><span class="mw-cite-backlink">^ <a href="#cite_ref-shrinking_9-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-shrinking_9-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text">Paul DeMone.

"The Incredible Shrinking CPU".

2004.

<a rel="nofollow" class="external autonumber" href="http://www.realworldtech.com/page.cfm?ArticleID=RWT062004172947&p=5">[2]</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20120531101531/http://www.realworldtech.com/page.cfm?ArticleID=RWT062004172947&p=5">Archived</a> 2012-05-31 at the <a href="Wayback_Machine" title="Wayback Machine">Wayback Machine</a></span>

</li>

<a rel="nofollow" class="external text" href="https://www.rose-hulman.edu/~hudson/Ec332/Papers/03Brainiacs.pdf">"Brainiacs, Speed Demons, and Farewell"</a>

by Linley Gwennap </span>

</li>

</ol></div></div>

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